1. Field of the Invention
The present invention relates to a method of forming a solder mask. More particularly, the present invention relates to a method of forming a solder mask on a wiring board.
2. Description of the Related Art
With the rapid development of digital electronic technologies, printed wiring boards are found widely used in digital electronic products. Electronic products, such as mobile phones, computers, and digital cameras etc., are fabricated with a printed wiring board. In other words, wiring boards are used for almost all of the electronic devices. According to the fabricating method, wiring boards can be divided into two major types: a lamination method and a build-up method. In general, the lamination method is applied to produce a Printed Wiring Board (PWB) which has a lower wiring density. On the other hand, the build-up method is applied to produce a package substrate with a higher wiring density. However, with the current trend for wiring boards with higher wiring density, regardless whether it is a PWB or a package substrate, the design of the PWB and the package substrate should meet the demand of high wiring density and small line width.
As described, a wiring board is to provide a support for the external electronic devices and a medium for transferring currents between them. Therefore, in the fabrication of a wiring board, wirings of the external electronic device assembling areas must be defined and a layer of high molecular weight material must cover the non-assembling areas to serve as a protection for the wiring board. The protective high molecular weight material layer is often referred to as the solder mask. Conventionally, the coating process for forming a solder mask on the wiring board includes spraying a layer of photosensitive ink on the surface of the printed wiring board; the photosensitive ink layer is exposed and developed to produce a patterned solder mask.
FIG. 1A is a top view of a conventional wiring board having a solder mask thereon. FIG. 1B is a cross-sectional view along line A-A′ of FIG. 1A. The wiring board 100 shown in FIGS. 1A and 1B includes a base layer 110, a wiring pattern 120 and a solder mask 130. The base layer 110 is, for example, a single insulating layer or a plurality of patterned conductive layers and at least one insulating layer alternately stacked over each other. The wiring pattern 120 on the surface of the base layer 110 includes a plurality of pads 122 and a plurality of conductive traces 124. The pads 122 are exposed by the openings 130a of the solder mask 130 and used for carrying and connecting with other external electronic devices such as capacitors or diodes. The conductive traces 124 are connected to the pads 122 for transmitting current signals. In addition, the solder mask 130 also covers the other portion of the conductive traces 124 that are not connected with external devices (the areas marked with dashed lines in FIG. 1A) so as to provide some protection.
Using the Non-Solder Mask Defined (NSMD) pad as an example, there is a gap d1 between the pad 122 of the wiring pattern 120 and the opening 130a. In the process of forming the solder mask 130, the size of the gap d1 is mainly determined by the precision of alignment of the coating machine. In general, if the screen-printing method is used to fabricate the solder mask 130, because of lower alignment accuracy, the gap d1 must be larger to prevent any solder mask 130 from directly covering the pad 122 and reducing the exposed surface of the pad 122. On the other hand, if the photolithographic process, which has higher alignment accuracy, is used to fabricate the solder mask 130, a gap d1 can be smaller than the one produced by the screen-printing method. Thus, the wiring density in the wiring board 100 can be increased.
With the demand for a higher wiring density in the wiring board 100, the gap d1 in between the pad 122 and the opening 130a of the solder mask 130 has to be reduced so that more wiring patterns 120 can be accommodated within the same area. Therefore, photolithographic process is more frequently selected as the means for forming the solder mask 130 due to the demand for a higher precision in the alignment.
With the upcoming trend for producing larger wiring boards 100, even the photolithographic method of forming the solder mask 130, which can produce a smaller gap d1, needs a plurality of trail substrates to obtain an accurate alignment due to the expansion and contraction of the wiring board. Alternatively, a glass substrate or separate exposure method is used to resolve this problem. However, the aforesaid method not only complicate the process of forming the solder mask 130, but also considerably increases the production cost. Although an ink-jet printing process can compensate for the expansion and contraction to produce a highly aligned solder mask 130 with a relatively small gap d1, the need for coating a large wiring board 100 often leads to a slowdown of the fabrication process. Consequently, the increase of production cost makes the ink-jet printing technique not suitable for mass-producing wiring boards 100 with high wiring density.